WQCG: Developments in superconducting erasure qubits for hardware-efficient quantum error correction

Speaker: Maria Violaris, Oxford Quantum Circuits

Abstract
Quantum computers are inherently noisy, and one of the key challenges for achieving large-scale, fault-tolerant quantum computing is to implement quantum error correction. In recent years, significant progress has been made in exploring and developing quantum error correction theory, in addition to experimental demonstrators of important milestones using various hardware platforms. An interesting direction has gained popularity of designing hardware that has a specific noise profile, leading to a significantly higher threshold for noise with certain quantum error correcting codes. In this talk, I introduce erasure qubits, which enable a particular type of hardware-efficient quantum error correction that uses a „dual-rail encoding” concatenated with another code. I will discuss implementations of erasure qubits using superconducting hardware, giving an overview of recent developments in theory and simulation, and hardware demonstrators. I will also cover the differences between implementations; near-term applications to the NISQ era and quantum error detection; and challenges and open questions for this approach.